A radix-16 FFT algorithm suitable for multiply-add instruction based on Goedecker method
نویسنده
چکیده
A radix-16 fast Fourier transform (FFT) algorithm suitable for multiply-add instruction is proposed. The proposed radix-16 FFT algorithm requires fewer floating-point instructions than the conventional radix-16 FFT algorithm on processors that have a multiplyadd instruction. Moreover, this algorithm has the advantage of fewer loads and stores than either the radix-2, 4 and 8 FFT algorithms or the split-radix FFT algorithm. We use Goedecker’s method to obtain an algorithm for computing radix-16 FFT with fewer floating-point instructions than the conventional radix-16 FFT algorithm. The number of floating-point instructions for the proposed radix-16 FFT algorithm is compared with those of conventional power-of-two FFT algorithms on processors with multiplyadd instruction.
منابع مشابه
Fast Radix 2, 3, 4, and 5 Kernels for Fast Fourier Transformations on Computers with Overlapping Multiply-Add Instructions
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